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San Jose, CA, United States of America

Victor Fong

This inventor holds 5 USPTO granted patents. Top assignee: Broadcom Corporation. Active years: 2006-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Victor Fong. Retrieved from https://idiyas.com/inventor/victor-fong-l01vcj7p

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 5

Average Co-Inventor Count = 1.4

ph-index = 2

Forward Citations = 13(Granted Patents)

Location History:

Sunnyvale, CA (US) (2008)
San Jose, CA (US) (2006 - 2009)
Cupertino, CA (US) (2010)

Company Filing History:

5 out of 11,124

Broadcom Corporation

Years Active: 2006-2010

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5 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7646083 - I/O connection scheme for QFN leadframe and package structures (2010-01-12),

2. 7564104 - Low ohmic layout technique for MOS transistors (2009-07-21),

3. 7359170 - RF circuit electrostatic discharge protection (2008-04-15),

4. 7326618 - Low OHMIC layout technique for MOS transistors (2008-02-05),

5. 7112855 - Low ohmic layout technique for MOS transistors (2006-09-26),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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