The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 12, 2010
Filed:
Mar. 31, 2008
Fan Yeung, Irvine, CA (US);
Sam Ziqun Zhao, Irvine, CA (US);
Nir Matalon, Sunnyvale, CA (US);
Victor Fong, Cupertino, CA (US);
Fan Yeung, Irvine, CA (US);
Sam Ziqun Zhao, Irvine, CA (US);
Nir Matalon, Sunnyvale, CA (US);
Victor Fong, Cupertino, CA (US);
Broadcom Corporation, Irvine, CA (US);
Abstract
Methods, systems, and apparatuses for integrated circuit packages and lead frames are provided. A quad flat no-lead (QFN) package includes a plurality of peripherally positioned pins, a die-attach paddle, an integrated circuit die, and an encapsulating material. The die-attach paddle is positioned within a periphery formed by the pins. The die is attached to the die-attach paddle. The encapsulating material encapsulates the die on the die-attach paddle, encapsulates bond wires connected between the die and the pins, and fills a space between the pins and the die-attach paddle. One or more of the pins are extended. An extended pin may be elongated, L shaped, T shaped, or 'wishbone' shaped. The extended pin(s) enable wire bonding of additional ground, power, and I/O (input/output) pads of the die in a manner that does not significantly increase QFN package cost.