Veerapaneni Nagbhushan

Title: Veerapaneni Nagbhushan: Innovator in Integrated Circuit Design

Introduction

Veerapaneni Nagbhushan is a notable inventor based in Saratoga, CA (US). He has made significant contributions to the field of integrated circuit design, holding a total of 3 patents. His work focuses on enhancing the efficiency and effectiveness of circuit layouts through innovative methodologies.

Latest Patents

Nagbhushan's latest patents include a "Method and apparatus for integrated circuit datapath layout using a vector editor." This invention provides a vector editor for creating integrated circuit datapath layouts. It utilizes various approaches for vector extraction from design input files, allowing for a more organized representation of layout elements. Another significant patent is the "Method and apparatus for layout synthesis of regular structures using relative placement." This patent automates the placement of layout objects based on relative placement constraints, improving the overall design process.

Career Highlights

Veerapaneni Nagbhushan is currently employed at Intel Corporation, where he continues to innovate in the field of integrated circuits. His expertise and contributions have positioned him as a valuable asset within the company.

Collaborations

Some of his notable coworkers include Vinoo N Srinivasan and Kumar Lalgudi, with whom he collaborates on various projects aimed at advancing integrated circuit technology.

Conclusion

Veerapaneni Nagbhushan's work in integrated circuit design exemplifies innovation and dedication to improving technology. His patents reflect a commitment to enhancing the efficiency of circuit layouts, making a lasting impact in the field.