San Jose, CA, United States of America

Utpal Desai

This inventor holds 2 USPTO granted patents. Top assignee: Intel Corporation. Active years: 2007-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Utpal Desai. Retrieved from https://idiyas.com/inventor/utpal-desai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 50.0

Average Co-Inventor Count = 3.0

ph-index = 2

Forward Citations = 34(Granted Patents)


Company Filing History:


Years Active: 2007-2008

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2 patents (USPTO):Explore Patents

Title: Utpal Desai: Microprocessor Power and Clock Modulation

Introduction

Utpal Desai is an inventor based in San Jose, California, and is associated with Intel Corporation. His patent work includes technology designed to help microprocessors respond to changes in power supply voltage.

Latest Patents

Desai is credited with 2 patents. His listed patent, “Power Supply Voltage Droop Compensated Clock Modulation for Microprocessors,” describes a circuit that detects a power supply voltage droop and reduces the clock frequency in response. This approach is intended to help manage microprocessor operation when the supply voltage falls.

Career Highlights

Desai’s listed invention addresses power management and clock control in microprocessors. The available information associates his work with Intel Corporation.

Collaborations

Desai’s listed coworkers include Rahul D. Limaye and Simon M. Tam.

Conclusion

Utpal Desai’s patent work focuses on voltage-droop detection and clock modulation, connecting power supply management with microprocessor operation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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