Mountain View, CA, United States of America

Ulrich Klostermann

This inventor holds 1 USPTO granted patent. Top assignee: Synopsys, Inc.. Active years: 2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ulrich Klostermann. Retrieved from https://idiyas.com/inventor/ulrich-klostermann-z067kq8e

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2022

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1 patent (USPTO):Explore Patents

Title: Ulrich Klostermann: Innovator in Semiconductor Fabrication

Introduction

Ulrich Klostermann is a notable inventor based in Mountain View, California. He has made significant contributions to the field of semiconductor fabrication, particularly through his innovative patent.

Latest Patents

Ulrich Klostermann holds a patent titled "Inclusion of stochastic behavior in source mask optimization." This patent describes a method for generating a mask used in the fabrication of semiconductor devices. The process involves selecting a source candidate, generating a process simulation model that incorporates a stochastic variance band model, and performing optical proximity correction (OPC) on the mask data. The method assesses lithographic evaluation metrics and computes costs to determine if they meet a threshold condition. If the costs do not satisfy the condition, a different source candidate may be selected.

Career Highlights

Ulrich Klostermann is currently employed at Synopsys, Inc., where he applies his expertise in semiconductor technology. His work focuses on enhancing the efficiency and effectiveness of semiconductor device fabrication.

Collaborations

He collaborates with notable colleagues, including William Stanton and Sylvain Berthiaume, contributing to advancements in their field.

Conclusion

Ulrich Klostermann's innovative work in semiconductor fabrication exemplifies the impact of research and development in technology. His contributions continue to shape the future of semiconductor manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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