This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Infineon Technologies Richmond, LP. Active years: 2003.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2003
Title: Ulf Lederer: Innovator in Semiconductor Technology
Introduction
Ulf Lederer is a prominent inventor based in Dresden, Germany. He has made significant contributions to the field of semiconductor technology, particularly in the area of failure analysis and mapping.
Latest Patents
Ulf Lederer holds a patent for "Advanced bit fail map compression with fail signature analysis." This innovative method provides a compressed bit fail map by testing semiconductor devices to determine failures. The process involves transferring failure information to display a compressed bit map, designating areas for corresponding failure locations. Additionally, failure classification is achieved by defining shapes and dimensions of fail areas, which indicate the type of failure.
Career Highlights
Ulf Lederer is associated with Infineon Technologies Richmond, LP, where he applies his expertise in semiconductor technology. His work has been instrumental in enhancing the efficiency of failure analysis in semiconductor devices.
Collaborations
Ulf has collaborated with notable colleagues, including Joerg Vollrath and Peter Oswald, contributing to advancements in their field.
Conclusion
Ulf Lederer's innovative work in semiconductor technology, particularly through his patented methods, showcases his commitment to improving failure analysis processes. His contributions continue to influence the industry positively.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile