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For the Inventor, By the Inventor

Folsom, CA, United States of America

Tuong P Trieu

USPTO Granted Patents = 13

Average Co-Inventor Count = 3.4

ph-index = 6

Forward Citations = 164(Granted Patents)


Company Filing History:

goldMedal12 out of 54,664 
 
Intel Corporation
 patents
silverMedal1 out of 832,680 
Other
 patents

Years Active: 1999-2010

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13 patents (USPTO):Explore Patents
1. 7797492 - Method and apparatus for dedicating cache entries to certain streams for performance optimization (2010-09-14),
2. 7612780 - Optimized memory addressing (2009-11-03),
3. 7230627 - Optimized memory addressing (2007-06-12),
4. 7181605 - Deterministic shut down of memory devices in response to a system warm reset (2007-02-20),
5. 7180520 - Queue partitioning mechanism (2007-02-20),
6. 6629217 - Method and apparatus for improving read latency for processor to system memory read transactions (2003-09-30),
7. 6330646 - Arbitration mechanism for a computer system having a unified memory architecture (2001-12-11),
8. 6314472 - Abort of DRAM read ahead when PCI read multiple has ended (2001-11-06),
9. 6243781 - Avoiding deadlock by storing non-posted transactions in an auxiliary buffer when performing posted and non-posted bus transactions from an outbound pipe (2001-06-05),
10. 6237055 - Avoiding livelock when performing a long stream of transactions (2001-05-22),
11. 5926651 - Output buffer with current paths having different current carrying (1999-07-20),
12. 5925135 - Clock rate compensation for a low frequency slave device (1999-07-20),
13. 5898859 - Address shadow feature and methods of using the same (1999-04-27),

Title: Tuong P Trieu: Innovator in Performance Optimization

Introduction

Tuong P Trieu is a notable inventor based in Folsom, CA, with a significant contribution to the field of technology. He holds a total of 13 patents, showcasing his innovative spirit and dedication to enhancing performance in computing systems.

Latest Patents

Among his latest patents is a method and apparatus for dedicating cache entries to certain streams for performance optimization. This invention involves partitioning a cache array into special-purpose and general-purpose entries, where special-purpose entries are allocated for streams with specific stream IDs. Another notable patent focuses on optimized memory addressing, which relates to accessing adjacent data blocks using dual channels in a memory device, thereby improving data retrieval efficiency.

Career Highlights

Tuong P Trieu has worked with prominent companies, including Intel Corporation, where he has applied his expertise in developing advanced technologies. His work has significantly impacted the performance optimization of memory systems.

Collaborations

Throughout his career, Tuong has collaborated with talented individuals such as Zohar Bogin and Anoop Mukker, contributing to various innovative projects.

Conclusion

Tuong P Trieu's contributions to technology through his patents and collaborations highlight his role as a key innovator in performance optimization. His work continues to influence advancements in the field.

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