This inventor holds 1 USPTO granted patent. Top assignee: Renesas Electronics Corporation. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Tsuyoshi Kanao: Semiconductor Manufacturing Inventor.
Introduction
Tsuyoshi Kanao is an inventor based in Tokyo, Japan, associated with Renesas Electronics Corporation. His patent work addresses semiconductor wafer processing and handling.
Latest Patents
Kanao is credited with 1 patent: “Manufacturing Method of Semiconductor Device, Method of Testing the Semiconductor Device and Wafer Holding Member.” The invention describes grinding a semiconductor wafer’s back surface to create a thinner central portion surrounded by a thicker portion. It also describes preparing a wafer holding member whose thickness exceeds the difference between those portions, then placing the wafer so its thinner portion contacts the member’s placement surface. These steps provide a defined approach to supporting the wafer during semiconductor-device manufacturing.
Career Highlights
Kanao’s listed patent reflects work in semiconductor manufacturing, wafer testing, and wafer-support technology. His association with Renesas Electronics Corporation connects his inventive work to a company active in the semiconductor industry.
Collaborations
The available information identifies Renesas Electronics Corporation as Kanao’s company affiliation. No additional collaborators are specified in the provided patent details.
Conclusion
Tsuyoshi Kanao’s documented contribution is a patented wafer-processing and holding method intended for semiconductor-device manufacturing and testing.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile