Taipei, Taiwan

Tsung-Tser Lee

This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tsung-Tser Lee. Retrieved from https://idiyas.com/inventor/tsung-tser-lee-21hs2gz1

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 44(Granted Patents)


Company Filing History:


Years Active: 1999

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1 patent (USPTO):Explore Patents

Title: Tsung-Tser Lee: Innovator in Integrated Circuit Technology

Introduction

Tsung-Tser Lee is a prominent inventor based in Taipei, Taiwan. He is known for his significant contributions to the field of integrated circuit technology. With a focus on enhancing the manufacturing processes of semiconductors, Lee has developed innovative methods that improve efficiency and effectiveness in the industry.

Latest Patents

One of Tsung-Tser Lee's notable patents is the "Damage free passivation layer etching process." This patent describes a method for etching bonding pad access openings in a passivation layer of an integrated circuit. The method utilizes a two-step etching procedure. The first step etches isotropically through a major portion of the passivation layer under conditions that provide very high etch rate selectivities of the passivation material to the photoresist. These high selectivities result in virtually no erosion of the photoresist while the greater part of the opening is etched. The second anisotropic etch step, wherein the base of the access opening is defined, faithfully replicates the dimensions of the mask pattern. This two-step etch process permits the use of photoresist layers of moderate thickness as well as photoresist layers with thin regions. The minimal erosion of the photoresist during the isotropic etch step secures sufficient photoresist coverage in the thin regions to prevent penetration and attack of passivation over wiring lines in the uppermost wiring level of the integrated circuit. Tsung-Tser Lee holds 1 patent.

Career Highlights

Tsung-Tser Lee has made significant strides in his career, particularly through his work at Taiwan Semiconductor Manufacturing Company Limited. His innovative approaches have contributed to advancements in semiconductor manufacturing processes. Lee's expertise in etching techniques has positioned him as a valuable asset in the field.

Collaborations

Throughout his career, Tsung-Tser Lee has collaborated with notable colleagues, including Jie-Shing Wu and Fang-Cheng Chen. These collaborations have fostered an environment of innovation and have led to the development of cutting-edge technologies in the semiconductor industry.

Conclusion

In summary, Tsung-Tser Lee is a distinguished inventor whose work in integrated circuit technology has made a lasting impact. His innovative etching processes and collaborations with industry peers highlight his commitment to advancing semiconductor manufacturing. Lee's contributions continue to shape the

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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