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For the Inventor, By the Inventor

Taipei, Taiwan

Tse-Hsien Wang

This inventor holds 8 USPTO granted patents and 1 published patent application. Top assignee: Via Technologies, Inc.. Active years: 2003-2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tse-Hsien Wang. Retrieved from https://idiyas.com/inventor/tse-hsien-wang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 8 

% Patents Active = 100.0

Average Co-Inventor Count = 1.8

ph-index = 4

Forward Citations = 54(Granted Patents)


Location History:

  • Taoyuan Hsien, TW (2003)
  • Pa-Te, TW (2004)
  • Taoyuan, TW (2004)
  • Bade, TW (2006)
  • Taipei, TW (2004 - 2007)

Company Filing History:

goldMedal8 out of 1,975 
 
Via Technologies, Inc.
 patents

Years Active: 2003-2007

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8 patents (USPTO):Explore Patents
1. 7159055 - Physical layer apparatus compliant to serial and parallel ATA interfaces (2007-01-02),
2. 7139924 - IDE control device suitable for supplying a plurality of requested clock signals to various hard discs (2006-11-21),
3. 7085861 - Serial ATA control circuit for automatically switching connection path (2006-08-01),
4. 7020834 - Circuit and signal encoding method for reducing the number of serial ATA external PHY signals (2006-03-28),
5. 6753796 - Conversion circuit for burst signals referencing to various clocks and method for the same (2004-06-22),
6. 6694400 - PCI system controller capable of delayed transaction (2004-02-17),
7. 6678756 - Method for controlling a first-in-first-out array to facilitate data transmissions between a lower frequency domain and a higher frequency domain of a computer system (2004-01-13),
8. 6549964 - Delayed transaction method and device used in a PCI system (2003-04-15),

Title: Tse-Hsien Wang: Innovator in Physical Layer Technology

Introduction

Tse-Hsien Wang is a prominent inventor based in Taipei, Taiwan. He has made significant contributions to the field of physical layer technology, holding a total of 8 patents. His work primarily focuses on enhancing the functionality and efficiency of data transfer interfaces.

Latest Patents

One of his latest patents is a physical layer apparatus compliant with both serial and parallel ATA interfaces. This invention includes a serial ATA physical layer circuit, a channel selection unit, and a channel selection controller. The design allows a media access controller of a host to selectively access either a serial ATA device or a parallel ATA device, enhancing the versatility of data connections. Another notable patent is an IDE control device that supplies various clock signals to multiple hard disks. This device utilizes a phase-locked loop to generate requested clock signals and an IDE controller to manage the selection and transmission of these signals to the appropriate hard disk.

Career Highlights

Tse-Hsien Wang is currently employed at Via Technologies, Inc., where he continues to innovate in the realm of data transfer technologies. His expertise has positioned him as a key player in the development of advanced IDE control devices and physical layer apparatuses.

Collaborations

Throughout his career, Wang has collaborated with notable colleagues, including Jiin Lai and Chau-Chad Tsai. These partnerships have fostered a creative environment that has led to the successful development of several groundbreaking technologies.

Conclusion

Tse-Hsien Wang's contributions to physical layer technology and data transfer interfaces have established him as a leading inventor in his field. His innovative patents continue to influence the industry and enhance the performance of data communication systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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