Tokyo, Japan

Toshihiko Ochiai

This inventor holds 33 USPTO granted patents and 2 EPO patents, primarily in Image Forming Apparatus. Top assignees: Canon Kabushiki Kaisha, Renesas Electronics Corporation, Kabushiki Kaisha Meidensha. Active years: 1985-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Toshihiko Ochiai. Retrieved from https://idiyas.com/inventor/toshihiko-ochiai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 87.9


Average Co-Inventor Count = 2.9

ph-index = 10

Forward Citations = 301(Granted Patents)


Location History:

  • Shizuoka-ken, JP (1998)
  • Kawasaki, JP (2017 - 2018)
  • Tokyo, JP (1985 - 2019)

Company Filing History:


Years Active: 1985-2019

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Areas of Expertise:
Semiconductor Device
Image Forming Apparatus
Integrated Circuit
Temperature Sensing
Heat-Fixing Device
Toner Adhesion
Recording Medium
Electrode Assembly
Cleaning Mechanism
Zinc-Bromine Battery
Pressure Roller
Transfer Medium
33 patents (USPTO):Explore Patents

Title: The Innovative Contributions of Toshihiko Ochiai

Introduction

Toshihiko Ochiai, based in Tokyo, Japan, is a highly innovative inventor with an impressive portfolio of 33 patents. His work primarily focuses on semiconductor technology, where he has made significant advancements that have impacted the industry.

Latest Patents

One of his latest patents describes a semiconductor device consisting of first and second semiconductor components mounted on an interposer situated on a wiring substrate. These components are electrically connected through the interposer, which contains several wiring layers, including first, second, and third layers stacked from a reference surface. Notably, in the first region between the two semiconductor components, the proportion of reference potential wiring in the third layer exceeds that in the first layer. Furthermore, the signal wiring ratio in the first layer is higher than in the third layer.

Another significant patent addresses a semiconductor device incorporating a Through Silicon Via (TSV) that penetrates a silicon substrate. This design features a seal ring made from low relative permittivity films surrounding the TSV when viewed from the wafer's front surface. This innovative arrangement effectively helps to suppress crack generation or progression in the low relative permittivity film within semiconductor devices.

Career Highlights

Toshihiko has worked with notable companies in the field, including Canon Kabushiki Kaisha and Renesas Electronics Corporation. His contributions to these organizations have furthered advancements in semiconductor technology, allowing for improved device performance and reliability.

Collaborations

Throughout his career, Toshihiko has collaborated with respected colleagues such as Toshiaki Miyashiro and Takehiko Suzuki. These partnerships have resulted in the development of pioneering technologies that exemplify the collaborative spirit in research and innovation.

Conclusion

With a strong foundation in semiconductor device technology and numerous patents to his name, Toshihiko Ochiai is a prominent figure in the innovation landscape. His inventions not only showcase his expertise but also contribute to the ongoing evolution of the semiconductor industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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