Teublitz, Germany

Tobias Weindler

This inventor holds 1 USPTO granted patent and 1 EPO patent. Top assignee: Infineon Technologies Ag. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tobias Weindler. Retrieved from https://idiyas.com/inventor/tobias-weindler

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Average Co-Inventor Count = 1.0

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Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Tobias Weindler - Innovator in Semiconductor Technology

Introduction

Tobias Weindler is an inventor based in Teublitz, Germany, who is currently associated with Infineon Technologies AG. He is known for his contributions to the field of semiconductor technology, particularly in the manufacturing processes of semiconductor devices. Although he does not have any granted patents, his work is significant in advancing the industry.

Latest Patent Applications

Tobias Weindler has filed a patent application titled "Method of Thinning a Semiconductor Substrate to High Evenness and Semiconductor Substrate Having a Device Layer of High Evenness." This application describes a method of manufacturing a semiconductor device that includes providing a semiconductor substrate. The substrate consists of a high-doped semiconductor substrate layer, a high-doped semiconductor device layer, and a low-doped semiconductor etch stop layer arranged between the two high-doped layers. The method involves removing the high-doped semiconductor substrate layer through dopant selective chemical etching, which stops at the low-doped semiconductor etch stop layer. Additionally, the low-doped semiconductor etch stop layer is thinned to expose the high-doped semiconductor device layer.

Conclusion

Tobias Weindler's innovative approach to semiconductor manufacturing showcases his commitment to advancing technology in this critical field. His contributions, although not yet reflected in granted patents, hold promise for future developments in semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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