Chongqing, China

Ting Liu

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Chongqing University of Posts and Telecommunications. Active years: 2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ting Liu. Retrieved from https://idiyas.com/inventor/ting-liu-50c4z883

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 8.0

ph-index = 1


Company Filing History:


Years Active: 2025

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1 patent (USPTO):Explore Patents

Title: Innovations of Ting Liu in LDPC Decoder Systems

Introduction

Ting Liu is an accomplished inventor based in Chongqing, China. He has made significant contributions to the field of decoder hardware design, particularly through his innovative patent related to layered semi-parallel LDPC decoder systems.

Latest Patents

Ting Liu holds a patent for a "Layered semi-parallel LDPC decoder system having a single permutation network." This invention pertains to a layered semi-parallel LDPC decoder system that utilizes a single permutation network. The system features a layered decoding architecture, a semi-parallel decoding structure, and a pipeline design that enhances the efficiency of the decoding process. By modifying the cyclic shift value of information blocks, the invention effectively reduces the hardware resources required for the decoder while maintaining high throughput.

Career Highlights

Ting Liu is affiliated with Chongqing University of Posts and Telecommunications, where he continues to advance research in decoder systems. His work has garnered attention for its innovative approach to reducing hardware complexity while improving performance.

Collaborations

Ting Liu collaborates with notable colleagues, including Hongsheng Zhang and Taiyun Ding, who contribute to his research endeavors.

Conclusion

Ting Liu's innovative work in the field of LDPC decoder systems exemplifies the potential for advancements in hardware design. His contributions not only enhance decoding efficiency but also pave the way for future innovations in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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