This inventor holds 1 USPTO granted patent. Top assignees: National Center for Advanced Packaging Co., Ltd., Shanghai Xianfang Semiconductor Co., Ltd.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
1 out of 3 
1 out of 3 Years Active: 2026
Title: Tianfang Chen and Wafer-Level Chip Packaging Innovation.
Introduction
Tianfang Chen is an inventor associated with Wuxi, China. His patent work addresses wafer-level chip packaging and the electrical interconnection of stacked chips.
Latest Patents
Chen is credited with 1 patent: “Wafer-Level Chip Structure, Multiple-Chip Stacked and Interconnected Structure and Fabricating Method Thereof.” The invention describes a wafer-level chip structure with a through-silicon via, an active surface containing a multilayer redistribution layer and bump, and a backside insulation dielectric layer connected to the via through a frustum-shaped transition structure. By introducing this transition between the exposed through-silicon via and the under-bump metallization, the design aims to improve impedance matching and reduce signal distortion caused by abrupt impedance changes.
Career Highlights
Chen’s listed company affiliations include Shanghai Xianfang Semiconductor Co., Ltd. and National Center for Advanced Packaging Co., Ltd. His patent reflects work on advanced packaging structures and methods for connecting multiple chips.
Collaborations
Liqiang Cao and Yangyang Yan are identified as Chen’s coworkers.
Conclusion
Tianfang Chen’s patent focuses on improving signal integrity in wafer-level and stacked-chip packaging through a frustum-shaped impedance transition structure.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile