Thean Loy Yap

Title: Thean Loy Yap: Innovator in Integrated Circuit Testing

Introduction

Thean Loy Yap is a notable inventor based in Singapore, recognized for his contributions to integrated circuit testing technologies. With a total of 4 patents to his name, he has made significant advancements in the field, particularly in reducing damage to integrated circuits during testing processes.

Latest Patents

One of his latest inventions is a test contact mechanism that provides innovative test contact systems and associated integrated circuit device testing methods. This invention aims to minimize the loss of integrated circuit devices due to handler mishaps. The test contact system exerts a contacting force against the substrate of a device under test, rather than solely against the die, which helps maintain good thermal contact without causing damage. Additionally, the invention features a vacuum seal made from a foam-type material that prevents devices from sticking, thereby reducing handler jams.

Another significant patent is the design of a picker nest for holding an IC package with minimized stress on fragile components during testing. This picker nest includes a vacuum suction mechanism that ensures no contact force is exerted on delicate components, such as bare IC dies. The conductive seal surrounding the picker nest opening provides effective sealing for vacuum suction, while also offering ESD protection during testing.

Career Highlights

Thean Loy Yap is currently employed at Advanced Micro Devices Corporation, where he continues to innovate in the field of integrated circuit testing. His work has been instrumental in enhancing the reliability and efficiency of testing systems.

Collaborations

He has collaborated with notable coworkers, including Boon Hee Wee and Seok Hiong Tan, contributing to the development of advanced testing technologies.

Conclusion

Thean Loy Yap's innovative patents and contributions to integrated circuit testing demonstrate his commitment to improving technology in this critical field. His work not only enhances testing efficiency but also significantly reduces the risk of damage to integrated circuits during the testing process.