Tokyo, Japan

Teruaki Kisu

This inventor holds 2 USPTO granted patents. Top assignees: Hitachi, Ltd., Other. Active years: 2002-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Teruaki Kisu. Retrieved from https://idiyas.com/inventor/teruaki-kisu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 3.0

ph-index = 2

Forward Citations = 45(Granted Patents)


Company Filing History:


Years Active: 2002-2004

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2 patents (USPTO):Explore Patents

Title: Teruaki Kisu: Innovator in Semiconductor Memory Technology

Introduction

Teruaki Kisu is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor memory devices, holding a total of 2 patents. His work focuses on enhancing the efficiency and compactness of memory cells, which are crucial for modern electronic devices.

Latest Patents

Kisu's latest patents include a method of manufacturing semiconductor memory devices and a semiconductor memory device itself. These patents disclose a gain cell structure that allows for a compact memory cell design at a low manufacturing cost. The memory cell consists of a reading MIS transistor and a writing MIS transistor. The reading MIS transistor features a pair of n-type semiconductor regions formed on a semiconductor substrate, along with a first gate electrode positioned via a first gate insulating film. The writing MIS transistor is arranged above the reading MIS transistor and has a layered structure comprising a lower semiconductor layer, an intermediate semiconductor layer, and an upper semiconductor layer. This vertical structure includes a second gate electrode on both sidewalls of the layered structure, enhancing the device's performance.

Career Highlights

Throughout his career, Teruaki Kisu has worked with notable companies, including Hitachi, Ltd. His experience in the semiconductor industry has allowed him to develop innovative solutions that address the challenges of memory device manufacturing.

Collaborations

Kisu has collaborated with esteemed colleagues such as Kazuo Nakazato and Masahito Takahashi. These partnerships have contributed to the advancement of semiconductor technology and the successful development of his patented inventions.

Conclusion

Teruaki Kisu's contributions to semiconductor memory technology exemplify his innovative spirit and dedication to advancing the field. His patents reflect a commitment to creating efficient and compact memory solutions that are essential for the future of electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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