Kanagawa, Japan

Tarou Fukunaga

This inventor holds 1 USPTO granted patent. Top assignee: Panasonic Corporation. Active years: 2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tarou Fukunaga. Retrieved from https://idiyas.com/inventor/tarou-fukunaga

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 7.0

ph-index = 1


Company Filing History:


Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: The Innovations of Tarou Fukunaga

Introduction

Tarou Fukunaga is a notable inventor based in Kanagawa, Japan. He has made significant contributions to the field of integrated circuit design. His work focuses on enhancing the efficiency and accuracy of pattern correction in circuit design.

Latest Patents

Fukunaga holds a patent for a "Pattern correction apparatus, pattern optimization apparatus, and integrated circuit design apparatus." This invention aims to provide a pattern correction apparatus that enables easy correction of traces not present on trace grids. The apparatus includes a trace movement section for relocating traces, a pattern correction section for making adjustments, and a trace pitch optimization section for optimizing the spacing between traces.

Career Highlights

Fukunaga is currently employed at Panasonic Corporation, where he continues to innovate in the field of electronics. His work has contributed to advancements in integrated circuit technology, making significant impacts on the industry.

Collaborations

He has collaborated with notable coworkers such as Mie Yamanaka and Mitsukiyo Matsui, further enhancing the innovative environment at Panasonic Corporation.

Conclusion

Tarou Fukunaga's contributions to integrated circuit design and his innovative patent demonstrate his commitment to advancing technology in the electronics field. His work continues to influence the industry positively.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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