Kyoto, Japan

Takuya Yonezawa

This inventor holds 3 USPTO granted patents. Top assignee: Rohm Co., Ltd.. Active years: 1999-2000.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takuya Yonezawa. Retrieved from https://idiyas.com/inventor/takuya-yonezawa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 1999-2000

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3 patents (USPTO):Explore Patents

Title: Takuya Yonezawa’s Semiconductor Inventions

Introduction

Takuya Yonezawa is an inventor associated with Kyoto, Japan, and Rohm Co., Ltd. His patent work includes methods for manufacturing semiconductor devices, particularly techniques involving floating gates and insulating layers. The supplied information lists 3 patents.

Latest Patents

One of Yonezawa’s latest patents is titled “Semiconductor Device and a Method for Manufacturing Thereof.” The invention describes removing an ONO layer near a programming transistor and forming its floating gate by etching a polysilicon layer. An oxidation process then creates a relatively thick silicon-oxide inter-layer film that covers the floating gate. During arsenic ion implantation, this film acts as a mask and prevents the ions from passing through, helping preserve the floating gate’s charge-storage characteristics.

Another listed patent, “Method for Manufacturing a Semiconductor Device,” concerns forming a floating gate above a local oxidation of silicon (LOCOS) layer. The method stops anisotropic etching after removing the targeted polysilicon, without performing the usual final wet-etching step. This helps prevent over-etching of the LOCOS layer and reduces the likelihood of stringers forming beneath the inter-layer film.

Career Highlights

Yonezawa’s listed inventions address manufacturing challenges in semiconductor devices. Their described approaches focus on protecting insulating structures and improving the reliability of floating-gate fabrication.

Collaborations

The supplied information identifies Masataka Tsuruta and Noriyuki Shimoji as Yonezawa’s coworkers. It does not specify their roles in the listed patents.

Conclusion

Takuya Yonezawa’s patent work at Rohm Co., Ltd. reflects a focus on semiconductor manufacturing processes, including floating-gate formation and the protection of charge-storage structures.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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