Kanagawa, Japan

Takeshi Nakano

This inventor holds 33 USPTO granted patents and 8 published patent applications and 4 EPO patents, primarily in Semiconductor Technology. Top assignees: Kabushiki Kaisha Toshiba, Kioxia Corporation, Kyocera Corporation. Active years: 2007-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takeshi Nakano. Retrieved from https://idiyas.com/inventor/takeshi-nakano

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 33 

% Patents Active = 69.7

 

Average Co-Inventor Count = 2.6

ph-index = 4

Forward Citations = 64(Granted Patents)


Location History:

  • Hamura, JP (2007)
  • Kamakura, JP (2007)
  • Yokohama, JP (2013)
  • Kawasaki, JP (2009 - 2024)
  • Kanagawa, JP (2012 - 2024)
  • Kawasaki Kanagawa, JP (2017 - 2024)

Company Filing History:


Years Active: 2007-2026

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Areas of Expertise:
Memory System
Semiconductor Device
Non-Aqueous Battery
Display Method
Voltage Generator
Core Discharge
Pressure Control
Optical Disk
Encoding Device
Mobile Communication
Imaging Device
Memory Controller
33 patents (USPTO):Explore Patents

Title: **Takeshi Nakano: Innovator in Battery and Semiconductor Technologies**

Introduction

Takeshi Nakano, based in Kanagawa, Japan, is a renowned inventor known for his significant contributions to the fields of battery technologies and semiconductor devices. With a remarkable portfolio of 29 patents, Nakano has proven to be a key innovator, particularly in the development of advanced materials and devices that enhance the performance and efficiency of electronic components.

Latest Patents

Among his latest patents, Nakano has developed a negative electrode for non-aqueous electrolyte secondary batteries. This innovative technique allows for improved cycle characteristics by combining silicon-based and carbon-based active materials without the need for traditional binding agents. The architecture of this negative electrode includes a layer where composite secondary particles are strategically arranged to enhance battery performance.

Additionally, his patent concerning a semiconductor storage device addresses the design of adjacent memory cells connected in series, which optimizes the operation of memory reads. The control circuit featured in this invention has been engineered to facilitate multiple levels of voltage application, thereby improving the efficiency and speed of data retrieval processes in semiconductor storage.

Career Highlights

Takeshi Nakano has established his career through significant work with prominent companies, including Toshiba Corporation and Kioxia Corporation. His role in these companies has allowed him to spearhead innovative projects and collaborate with leading experts in the field of electrical engineering.

Collaborations

Throughout his journey, Nakano has collaborated with esteemed coworkers such as Mikio Ogawa and Hiroshi Sukegawa. Together, they have worked on pioneering advancements in battery and semiconductor technologies, contributing to the overall growth and innovation within the industry.

Conclusion

Takeshi Nakano's ongoing commitment to innovation and excellence is evident in his numerous patents and contributions to the tech industry. His work continues to influence the development of more efficient and effective electronic devices, ultimately enhancing modern technology and paving the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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