The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2024

Filed:

Aug. 05, 2022
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Hiroki Date, Chigasaki Kanagawa, JP;

Takeshi Nakano, Kawasaki Kanagawa, JP;

Assignee:

KIOXIA CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/26 (2006.01); G11C 11/56 (2006.01); G11C 16/04 (2006.01); H10B 41/27 (2023.01); H10B 43/27 (2023.01);
U.S. Cl.
CPC ...
G11C 11/5642 (2013.01); G11C 11/5671 (2013.01); G11C 16/0483 (2013.01); G11C 16/26 (2013.01); H10B 41/27 (2023.02); H10B 43/27 (2023.02);
Abstract

A semiconductor storage device includes: a first memory cell and a second memory cell that are adjacent to each other and connected to each other in series; a first word line connected to the first memory cell; a second word line connected to the second memory cell; and a control circuit. The control circuit is configured to, in a first read operation to read a first bit stored in the first memory cell, apply a first voltage to the first word line, and then, apply a first read voltage lower than the first voltage, to the first word line, and apply a second voltage to the second word line, and then, apply a third voltage lower than the second voltage and higher than the first voltage, to the second word line. The third voltage is applied to the second word line after the first read voltage is applied to the first word line.


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