IDiyas

For the Inventor, By the Inventor

Yokohama, Japan

Takeo Tatematsu

USPTO Granted Patents = 12

Average Co-Inventor Count = 1.7

ph-index = 9

Forward Citations = 173(Granted Patents)


Location History:

  • Kawasaki, JP (1979)
  • Yokohama, JP (1984 - 1992)
  • Sagamihara, JP (1992)

Company Filing History:

goldMedal12 out of 39,228 
 
Fujitsu Corporation
 patents

Years Active: 1979-1992

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12 patents (USPTO):Explore Patents
1. 5140555 - Semiconductor integrated device having uniform noise between a pair of (1992-08-18),
2. 5138419 - Wafer scale integration device with dummy chips and relay pads (1992-08-11),
3. 5111073 - Wafer-scale semiconductor device having fail-safe circuit (1992-05-05),
4. 4982369 - Self-refresh semiconductor memory device responsive to a refresh request (1991-01-01),
5. 4821238 - Semiconductor memory device having test pattern generating circuit (1989-04-11),
6. 4802127 - Output buffer circuit for a semiconductor memory device (1989-01-31),
7. 4752914 - Semiconductor integrated circuit with redundant circuit replacement (1988-06-21),
8. 4707806 - Semiconductor integrated circuit device having fuse-type information (1987-11-17),
9. 4592025 - Information storing circuit using blown and unblown fuses (1986-05-27),
10. 4473895 - Semiconductor memory device (1984-09-25),
11. 4464750 - Semiconductor memory device (1984-08-07),
12. 4156939 - Integrated semiconductor memory device (1979-05-29),

Title: The Innovations of Takeo Tatematsu

Introduction

Takeo Tatematsu is a prominent inventor based in Yokohama, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 12 patents. His work has been instrumental in advancing the capabilities of integrated devices.

Latest Patents

Among his latest patents is a semiconductor integrated device designed to maintain uniform noise levels between pairs of floating voltage portions. This innovation includes a signal line that crosses over or under these floating voltage portions, along with a non-floating voltage portion. Additionally, he has developed a wafer scale integration device that incorporates dummy chips and relay pads. This device features real chips located in the center of the wafer and dummy chips around the circumference, which help prevent short-circuiting of power supply lines at the wafer's edge.

Career Highlights

Takeo Tatematsu has had a distinguished career at Fujitsu Corporation, where he has been able to apply his expertise in semiconductor technology. His innovative designs have not only enhanced the performance of devices but have also contributed to the overall efficiency of semiconductor manufacturing processes.

Collaborations

Throughout his career, Tatematsu has collaborated with notable colleagues, including Yoshihiro Takemae and Tomio Nakano. These partnerships have fostered a creative environment that has led to groundbreaking advancements in their field.

Conclusion

Takeo Tatematsu's contributions to semiconductor technology exemplify the spirit of innovation. His patents and collaborative efforts continue to influence the industry, showcasing the importance of creativity and teamwork in technological advancement.

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