Kawasaki, Japan

Takaya Kato

This inventor holds 1 USPTO granted patent. Top assignee: Fujitsu Corporation. Active years: 2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takaya Kato. Retrieved from https://idiyas.com/inventor/takaya-kato-cibxtko9

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2007

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1 patent (USPTO):Explore Patents

Title: Takaya Kato: Innovator in Semiconductor Technology

Introduction

Takaya Kato is a prominent inventor based in Kawasaki, Japan. He has made significant contributions to the field of semiconductor technology, particularly through his innovative methods in semiconductor device manufacturing.

Latest Patents

Kato holds a patent for a semiconductor device manufacture method and etching system. This method includes several steps, such as forming a resist layer above a work target layer, exposing and developing the resist layer to create resist patterns, and monitoring the widths of these patterns. The process involves determining etching conditions using a mixed gas to achieve desired pattern widths stably through plasma etching. He has 1 patent to his name.

Career Highlights

Kato is associated with Fujitsu Corporation, where he applies his expertise in semiconductor manufacturing. His work has been instrumental in advancing the efficiency and effectiveness of semiconductor devices.

Collaborations

He has collaborated with notable colleagues, including Takeshi Goto and Mitsugu Tajima, contributing to various projects within the semiconductor field.

Conclusion

Takaya Kato's innovative work in semiconductor technology exemplifies the impact of dedicated inventors in advancing modern technology. His contributions continue to influence the industry significantly.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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