Tokyo, Japan

Takashi Miida

USPTO Granted Patents = 7 

Average Co-Inventor Count = 2.1

ph-index = 4

Forward Citations = 93(Granted Patents)


Location History:

  • Hsin-Chu, TW (2010 - 2012)
  • Tokyo, JP (1984 - 2015)

Company Filing History:


Years Active: 1984-2015

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7 patents (USPTO):Explore Patents

Title: Takashi Miida: Innovator in NAND Flash Memory Technology

Introduction

Takashi Miida is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of NAND flash memory technology, holding a total of 7 patents. His innovative approaches have led to advancements that enhance the efficiency and reliability of memory devices.

Latest Patents

One of Miida's latest patents involves a programming method for NAND flash memory devices aimed at reducing excess electrons in channels. This method utilizes a self-boosting scheme to eliminate excess electrons in the channel of an inhibit cell string, which can otherwise cause programming disturbances. By applying a negative voltage to the word lines connected to the inhibit cell string before boosting the channel, this technique enhances program immunity. Additionally, the patent describes a row decoder circuitry to facilitate the programming operation and a file system architecture based on the programming scheme to improve file management efficiency.

Career Highlights

Throughout his career, Takashi Miida has worked with notable companies such as Fujitsu Corporation and Powerchip Technology Corporation. His experience in these organizations has allowed him to develop and refine his innovative ideas in memory technology.

Collaborations

Miida has collaborated with esteemed colleagues, including Akira Takei and Yoshihiko Hika. These partnerships have contributed to the advancement of his research and the successful implementation of his inventions.

Conclusion

Takashi Miida's work in NAND flash memory technology exemplifies the impact of innovation in the field of electronics. His patents and collaborations reflect a commitment to enhancing memory device performance and reliability.

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