Los Angeles, CA, United States of America

Tae-Sik Yoon

This inventor holds 3 USPTO granted patents and 1 EPO patent. Top assignee: University of California. Active years: 2007-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tae-Sik Yoon. Retrieved from https://idiyas.com/inventor/tae-sik-yoon-530ipegj

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0


Average Co-Inventor Count = 2.0

ph-index = 3

Forward Citations = 18(Granted Patents)


Company Filing History:


Years Active: 2007-2009

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3 patents (USPTO):Explore Patents

Title: Tae-Sik Yoon: Innovator in Semiconductor Technology

Introduction

Tae-Sik Yoon is a prominent inventor based in Los Angeles, CA. He has made significant contributions to the field of semiconductor technology, holding a total of 3 patents. His work focuses on methods that enhance the performance and reliability of semiconductor devices.

Latest Patents

One of Tae-Sik Yoon's latest patents is titled "Method for controlling dislocation positions in silicon germanium buffer layers." This innovative method involves irradiating specific regions of a silicon germanium layer with a dislocation-inducing agent. The process includes depositing a strained silicon germanium layer on a substrate, which may be subjected to an annealing process to achieve a relaxed state. This technique allows for the fabrication of semiconductor-based devices in non-damaged regions, effectively confining threading dislocations to designated areas.

Another notable patent is "Device containing isolation regions with threading dislocations." This article of manufacture features a substrate with a relaxed buffer layer that includes a plurality of isolation regions. These regions contain threading dislocations, while the rest of the relaxed buffer layer remains substantially free of such dislocations. This design enhances the overall performance of semiconductor devices by strategically managing dislocation placement.

Career Highlights

Tae-Sik Yoon is affiliated with the University of California, where he continues to advance research in semiconductor technologies. His innovative approaches have garnered attention in the academic and industrial sectors, contributing to the development of more efficient semiconductor devices.

Collaborations

Tae-Sik Yoon collaborates with Ya-Hong Xie, working together to push the boundaries of semiconductor research and development. Their partnership exemplifies the importance of teamwork in achieving groundbreaking innovations.

Conclusion

Tae-Sik Yoon's contributions to semiconductor technology through his patents and collaborations highlight his role as a key innovator in the field. His work not only advances scientific understanding but also paves the way for future technological advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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