T Dean Skelton

Title: T Dean Skelton: Innovator in Logic Circuitry and Graphical Imaging

Introduction

T Dean Skelton is a notable inventor based in San Jose, CA. He has made significant contributions to the fields of logic circuitry and graphical imaging. With a total of 2 patents, Skelton's work showcases his innovative approach to technology.

Latest Patents

One of Skelton's latest patents is titled "Module level scan testing." This invention involves a design of logic circuitry that is divided into one or more discrete logic modules. These modules can be reused in other designs of circuitry. An automated test pattern generator (ATPG) program is applied to the discrete module, resulting in a reusable ATPG pattern for future designs. Another significant patent is the "Method and apparatus for clipping text." This method describes a process for generating graphical images, such as fonts, where expansion data for portions not to be written is excluded from the source data.

Career Highlights

Skelton is currently employed at Chips and Technologies, LLC, where he continues to develop innovative solutions in technology. His work has had a lasting impact on the industry, particularly in the areas of logic testing and graphical representation.

Collaborations

One of his notable coworkers is Pat Y Hom, with whom he has likely collaborated on various projects within their field.

Conclusion

T Dean Skelton's contributions to technology through his patents and work at Chips and Technologies, LLC highlight his role as an influential inventor. His innovative designs in logic circuitry and graphical imaging continue to shape the industry.