For the Inventor, By the Inventor

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San Jose, CA, United States of America

Chips and Technologies, LLC.

USPTO Granted Patents = 80

Forward Citations = 1,785

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69 inventors (with patents filed for the assignee):

Robert W Catlin (11 out of 11 patents)

Morris E Jones, Jr (9 out of 20 patents)

Arun Johary (8 out of 17 patents)

4. Robert M Pleva (7 out of 8 patents)

5. James S Blomgren (6 out of 39 patents)

6. James E Margeson, Iii (5 out of 12 patents)

7. Michael G Fung (5 out of 5 patents)

8. James A Picard (4 out of 4 patents)

9. Stuart T Auvinen (4 out of 8 patents)

10. Justin Wang (4 out of 4 patents)

11. Tetsuji Oguchi (4 out of 4 patents)

12. Tuan Luong (4 out of 4 patents)

13. Ignatius B Tjandrasuwita (3 out of 6 patents)

14. Pierre M Selwan (3 out of 3 patents)

15. Edward P Hutchins (3 out of 3 patents)

Core Competencies:

Video Data Reduction

Image Scaling

Memory Controller

Dynamic Bus Arbitration

Graphics Controller

Power Management

Grey Scale Images

Microprocessor

Bus Architecture

Asynchronous Channels

Flat Panel Display

Data Cache Management

80 patents: Sort by Forward Citations

1. 6553153 - Method and apparatus for reducing video data (2003-04-22),

2. 6211859 - Method for reducing pulsing on liquid crystal displays (2001-04-03),

3. 6205181 - Interleaved strip data storage system for video processing (2001-03-20),

4. RE37069 - Data stream converter with increased grey levels (2001-02-27),

5. 6172538 - Universal pulse synchronizer (2001-01-09),

6. 6125412 - System for performing input and output operations to and from a processor (2000-09-26),

7. 6079040 - Module level scan testing (2000-06-20),

8. 6061047 - Method and apparatus for clipping text (2000-05-09),

9. 6055609 - Apparatus and method for improving bus usage in a system having a shared (2000-04-25),

10. 6034663 - Method for providing grey scale images to the visible limit on liquid (2000-03-07),

11. 5940085 - Register controlled text image stretching (1999-08-17),

12. 5914677 - Apparatus and method for scanning a switch array (1999-06-22),

13. 5903283 - Video memory controller with dynamic bus arbitration (1999-05-11),

14. 5802548 - Software programmable edge delay for SRAM write enable signals on dual (1998-09-01),

15. 5793385 - Address translator for a shared memory computing system (1998-08-11),

Company Overview

Chips and Technologies, LLC, based in San Jose, CA, specializes in advanced video processing technologies. The company focuses on developing solutions for video data reduction, image scaling, and graphics control, catering to a variety of applications in multimedia and computing. Their expertise extends to memory controllers, dynamic bus arbitration, and power management, enabling efficient processing of grey scale images and enhancing overall system performance. With a commitment to innovation, Chips and Technologies plays a significant role in the evolution of video technology.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

80 Patents

#134 in San Jose, CA

#1,071 in California

#4,633 in US

#9,463 in the World

San Jose, CA, United States of America

Chips and Technologies, LLC.

Forward Citations = 1,785

69 inventors:

Robert W Catlin (11 out of 11 patents)

Morris E Jones, Jr (9 out of 20 patents)

Arun Johary (8 out of 17 patents)

4. Robert M Pleva (7 out of 8 patents)

5. James S Blomgren (6 out of 39 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Chips and Technologies, LLC.. Retrieved from https://idiyas.com/company/chips-and-technologies

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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