Santa Clara, CA, United States of America

Sujit T Zachariah

This inventor holds 3 USPTO granted patents. Top assignee: Intel Corporation. Active years: 2002-2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sujit T Zachariah. Retrieved from https://idiyas.com/inventor/sujit-t-zachariah

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 66.7

Average Co-Inventor Count = 2.6

ph-index = 1

Forward Citations = 11(Granted Patents)


Company Filing History:


Years Active: 2002-2003

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3 patents (USPTO):Explore Patents

Title: Biography of Inventor Sujit T Zachariah

Introduction: Sujit T Zachariah is a notable inventor based in Santa Clara, California. He has made significant contributions to the field of integrated circuit design and fault extraction. With a total of three patents to his name, his work has had a considerable impact on the industry.

Latest Patents: Sujit T Zachariah's latest patents include a scalable approach to extracting bridges from a hierarchically described VLSI layout, which serves as a bridge fault extractor. This innovative method involves flattening segments of an integrated circuit layout to produce an annotated list of rectangles, allowing for the computation of a fault list. His other patent focuses on a computer-implemented method for extracting bridges from an integrated circuit layout in a two-net analysis mode, determining maximum critical areas and merging them to analyze defects effectively.

Career Highlights: Sujit has built a successful career at Intel Corporation, where he has applied his expertise in integrated circuit design. His work has been instrumental in advancing the methodologies used in fault extraction and analysis.

Collaborations: Throughout his career, Sujit has collaborated with esteemed colleagues such as Sreejit Chakravarty and Carl D Roth. These collaborations have further enriched his contributions to the field.

Conclusion: Sujit T Zachariah continues to be a driving force in the realm of integrated circuit design and fault

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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