Suhasini Rege

Title: Suhasini Rege: Innovator in Integrated Circuit Design

Introduction

Suhasini Rege is a prominent inventor based in Karnataka, India. She has made significant contributions to the field of integrated circuit design, showcasing her expertise through her innovative patents. Her work focuses on enhancing the efficiency and effectiveness of clock tree planning in integrated circuits.

Latest Patents

Suhasini holds a patent for "Incremental Clock Tree Planning." This method involves receiving an integrated circuit design that includes multiple sub-circuits and clocks to be distributed among them. The process includes setting constraints for generating a clock network, building a clock tree graph based on a cached initial clock tree graph, and generating a pin topology for the clock network. The final step involves placing pins for the clock network at various sides of the sub-circuits to create an effective pin placement.

Career Highlights

Suhasini Rege is currently employed at Synopsys, Inc., where she applies her knowledge and skills in integrated circuit design. Her innovative approach has led to advancements in the field, making her a valuable asset to her company and the industry.

Collaborations

Suhasini has collaborated with notable colleagues, including Prashant Gupta and Shibaji Banerjee. These collaborations have further enriched her work and contributed to the success of her projects.

Conclusion

Suhasini Rege is a trailblazer in the realm of integrated circuit design, with her patent on incremental clock tree planning exemplifying her innovative spirit. Her contributions continue to influence the industry positively.