Monmouth Junction, NJ, United States of America

Sudipta Bhawmik

This inventor holds 7 USPTO granted patents. Top assignees: Agere Systems Guardian Corp., Agere Systems Inc., Lucent Technologies Inc.. Active years: 1997-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sudipta Bhawmik. Retrieved from https://idiyas.com/inventor/sudipta-bhawmik

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 7

Forward Citations = 325(Granted Patents)


Location History:

  • Princeton, NJ (US) (1997)
  • Monmouth Junction, NJ (US) (2000 - 2004)

Company Filing History:


Years Active: 1997-2004

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7 patents (USPTO):Explore Patents

Title: Sudipta Bhawmik: Innovator in BIST Technologies

Introduction

Sudipta Bhawmik is a prominent inventor based in Monmouth Junction, NJ (US). He has made significant contributions to the field of Built-In Self-Test (BIST) technologies, holding a total of 7 patents. His work focuses on improving test quality and efficiency in integrated circuits.

Latest Patents

One of his latest patents is titled "Method and system for improving the test quality for scan-based BIST using a general test application scheme." This innovative approach aims to enhance test quality without adding extra logic to the Circuit Under Test (CUT). The proposed scheme divides the testing process into multiple sessions, applying varying capture cycles after scanning in a test pattern to maximize fault detection. A procedure is outlined to determine the optimal number of capture cycles for each fault, ultimately enhancing the random testability of the CUT.

Another notable patent is "Method for implementing a BIST scheme into integrated circuits for testing RTL controller-data paths in the integrated circuits." This method allows for testing a controller-data path RTL circuit using a BIST scheme without imposing significant design restrictions. It involves extracting a state table from the controller netlist and performing symbolic testability analysis to create test environments for untested data path elements.

Career Highlights

Throughout his career, Sudipta Bhawmik has worked with several notable companies, including Agere Systems, Guardian Corporation, and Lucent Technologies Inc. His experience in these organizations has contributed to his expertise in BIST technologies and integrated circuit testing.

Collaborations

Sudipta has collaborated with esteemed colleagues such as Kwang-Ting Cheng and Huan-Chih Tsai, who have also made significant contributions to the field of electronics and testing methodologies.

Conclusion

Sudipta Bhawmik's innovative work in BIST technologies has greatly advanced the testing capabilities of integrated circuits. His patents reflect a commitment to improving test quality and efficiency, making him a valuable contributor to the field of electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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