Sudhanshu Jayaswal

Title: Sudhanshu Jayaswal: Innovator in Networking System-on-Chip Verification

Introduction

Sudhanshu Jayaswal is a notable inventor based in Noida, India. He has made significant contributions to the field of networking system-on-chip verification. With a total of 2 patents to his name, his work focuses on enhancing the efficiency and reliability of network systems.

Latest Patents

One of Sudhanshu's latest patents is related to latency testing in networking system-on-chip verification. This technology involves techniques that assess latency in the design verification of networking systems. A hardware model of interface circuitry is implemented in a reconfigurable hardware modeling device, which associates arrival time information with messages delivered to a hardware model of a circuit design. Additionally, it associates latency information with messages dispatched by the hardware model. The arrival time and latency information are determined with respect to a model time reference provided in the reconfigurable hardware modeling device.

Another significant patent focuses on traffic shaping in networking system-on-chip verification. In this innovation, traffic-shaping information is associated with ingress transaction-level messages by a traffic generation device. These messages, along with the traffic-shaping information, are sent to a reconfigurable hardware modeling device. The ingress transaction-level messages are then converted to ingress signal-level messages by a hardware model of interface circuitry. Based on the traffic-shaping information, these messages are delivered to a hardware model of a circuit design implemented in the reconfigurable hardware modeling device.

Career Highlights

Sudhanshu Jayaswal is currently employed at Mentor Graphics Corporation, where he continues to develop innovative solutions in the field of networking. His expertise in system-on-chip design verification has positioned him as a valuable asset to his organization.

Collaborations

Sudhanshu has collaborated with several talented individuals in his field, including Deepak Kumar Garg and Saurabh Khaitan. These collaborations have further enriched his work and contributed to the advancement of technology in networking systems.

Conclusion

Sudhanshu Jayaswal is a prominent inventor whose work in networking system-on-chip verification has led to significant advancements in the field. His innovative patents demonstrate his commitment to improving technology and enhancing system performance.