San Jose, CA, United States of America

Subhasish Bandyopadhyay

This inventor holds 1 USPTO granted patent. Top assignee: Applied Materials, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Subhasish Bandyopadhyay. Retrieved from https://idiyas.com/inventor/subhasish-bandyopadhyay

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0

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Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Subhasish Bandyopadhyay and Semiconductor Process Innovation.

Introduction

Subhasish Bandyopadhyay is an inventor based in San Jose, California, and is associated with Applied Materials, Inc. His work includes an invention focused on adapting machine-learning models for semiconductor processing equipment.

Latest Patents

Bandyopadhyay is credited with 1 patent: “Methods and Mechanisms for Modifying Machine-Learning Models for New Semiconductor Processing Equipment.” The invention describes a manufacturing system that identifies a machine-learning model trained to make predictions for one process chamber, then uses that model and metrology data from a substrate produced in another chamber to train a model for the second chamber. This approach is designed to generate predictive data for new processing equipment.

Career Highlights

The available information connects Bandyopadhyay’s patent work with Applied Materials, Inc., a company involved in semiconductor manufacturing technology. His patented method addresses the challenge of adapting predictive models to different process chambers using relevant metrology data.

Collaborations

The patent identifies an electronic device manufacturing system and describes processor-based model training. The supplied information does not specify individual co-inventors or other collaborators.

Conclusion

Subhasish Bandyopadhyay’s patent presents a method for adapting machine-learning predictions to new semiconductor process chambers, linking model reuse with metrology data to support equipment-specific predictions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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