Dallas, TX, United States of America

Stephen A Farnow

This inventor holds 2 USPTO granted patents. Top assignee: Texas Instruments Corporation. Active years: 1979-1982.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Stephen A Farnow. Retrieved from https://idiyas.com/inventor/stephen-a-farnow

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 1.6

ph-index = 2

Forward Citations = 41(Granted Patents)


Location History:

  • Dallas, TX (US) (1979)
  • Beaverton, OR (US) (1982)

Company Filing History:


Years Active: 1979-1982

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2 patents (USPTO):Explore Patents

Title: The Innovations of Stephen A. Farnow: A Visionary in CMOS Technology

Introduction

Stephen A. Farnow is a notable inventor based in Dallas, TX, whose contributions to the field of technology have led to the successful acquisition of two patents. His work primarily revolves around improving complementary metal-oxide-semiconductor (CMOS) devices and methodologies, showcasing his expertise and innovative spirit.

Latest Patents

Farnow's latest patents reflect his deep understanding of semiconductor technology. One of his key inventions is a method of making a CMOS device that allows for three-level interconnects. This improved device employs the standard N-channel self-aligned silicon gate structure and process but has been modified to incorporate P-channel transistors. The design utilizes a P-type substrate as the starting material, making it highly effective. The source and drain regions are defined prior to the definition of the polycrystalline silicon gate, allowing the source and drain to run under the polysilicon, which leads to the advantages of self-aligned gates.

Another significant patent involves a split gate electrode and a self-aligned antiblooming structure. In this invention, excess signal charge generated during optical overload situations in charge-coupled sensing regions is efficiently removed through an antiblooming drain implanted in the sensing array's substrate. This ingenious method enhances image capture by separating the antiblooming drain from the sensing regions via a potential barrier created by a gate electrode. The precise fabrication method allows the antiblooming drain to be self-aligned with the corresponding gate electrodes, demonstrating Farnow's inventive prowess.

Career Highlights

Stephen A. Farnow has made significant strides in his career at Texas Instruments Corporation. His focused efforts in research and development have been central to the advancement of semiconductor technology, and his accomplishments are recognized within the industry. His innovative spirit and contributions help drive the company forward in these competitive fields.

Collaborations

Throughout his career, Farnow has had the pleasure of working alongside accomplished colleagues, including James E. Ponder and Graham S. Tubbs. These collaborations have further fostered innovations, allowing for the sharing of ideas and breakthroughs in their respective fields.

Conclusion

Stephen A. Farnow's work exemplifies the essence of innovation in technology. His patents reflect a commitment to enhancing the functionality and efficiency of CMOS devices, and his collaborative spirit fosters an environment of creativity and advancement. Through his contributions at Texas Instruments Corporation, Farnow continues to impact the tech industry and inspire future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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