San Diego, CA, United States of America

Sreemala Pannala

This inventor holds 4 USPTO granted patents. Top assignees: Oracle America, Inc., Oracle International Corporation, Sun Microsystems, Inc.. Active years: 2005-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sreemala Pannala. Retrieved from https://idiyas.com/inventor/sreemala-pannala

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 75.0

Average Co-Inventor Count = 1.5

ph-index = 2

Forward Citations = 13(Granted Patents)


Location History:

  • Sunnyvale, CA (US) (2005)
  • San Diego, CA (US) (2010 - 2014)

Company Filing History:


Years Active: 2005-2014

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4 patents (USPTO):Explore Patents

Title: Sreemala Pannala: Innovator in Chip Technology

Introduction

Sreemala Pannala is a notable inventor based in San Diego, CA. He has made significant contributions to the field of chip technology, holding a total of 4 patents. His work focuses on enhancing communication bandwidth and performance in computer systems.

Latest Patents

One of his latest patents is for a micro-link high-bandwidth chip-to-chip bus. This innovation includes a chip package that features a micro-link between components on a substrate. The micro-link is designed as an ultra-short multi-conductor transmission line with shared reference planes, resulting in a distribution of impedance values. This design allows for the communication of one symbol at a time, ensuring that multiple reflections reach a substantial fraction of a steady-state value within a symbol time. This advancement facilitates the scaling of communication bandwidth between components with low latency, ultimately improving the performance of computer systems that utilize the chip package.

Another significant patent involves package designs for fully functional and partially functional chips. This method includes obtaining the operational status of a first processor core associated with multiple processor cores on a chip. It also involves configuring a first IO block of a package design based on the operational status of the first processor core, which is based on a fully functional chip. The stackup of the package design is then configured for use with the chip.

Career Highlights

Sreemala Pannala has worked with prominent companies such as Oracle America, Inc. and Oracle International Corporation. His experience in these organizations has contributed to his expertise in chip technology and innovation.

Collaborations

Throughout his career, Sreemala has collaborated with notable colleagues, including Bidyut Kanti Sen and Robert Paul Masleid. These collaborations have further enriched his work and contributions to the field.

Conclusion

Sreemala Pannala is a distinguished inventor whose work in chip technology has led to significant advancements in communication bandwidth and performance. His innovative patents and career achievements reflect his dedication to enhancing computer systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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