Bucheon, South Korea

Soonho Kwon

This inventor holds 2 USPTO granted patents and 3 published patent applications. Top assignee: Power Master Semiconductor Co., Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Soonho Kwon. Retrieved from https://idiyas.com/inventor/soonho-kwon-djvukec9

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 2 

Average Co-Inventor Count = 5.0

ph-index = 1


Company Filing History:


Years Active: 2026

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2 patents (USPTO):Explore Patents

Title: Soonho Kwon’s Semiconductor Device Innovations.

Introduction

Soonho Kwon is an inventor based in Bucheon, South Korea. His work focuses on semiconductor devices, including chip packaging and inverter-driving modules. He is associated with Power Master Semiconductor Co., Ltd. Kwon is credited with 2 patents.

Latest Patents

Kwon’s patent work includes two inventions titled “Semiconductor device.”

One describes a device with two semiconductor chips mounted on a substrate and connected to an extended lead frame. A groove between the lead frame’s chip-connection regions and a heat sink positioned above the chips are features of the design.

The other describes a semiconductor module package for driving an inverter. It arranges semiconductor chips in separate rows for right- and left-phase switching patterns, with connections that link chips in series within each row and connect the rows in parallel.

Career Highlights

The available information highlights Kwon’s contributions to semiconductor device design, particularly chip arrangement, electrical connections, and heat management. His work is associated with Power Master Semiconductor Co., Ltd.

Collaborations

Kwon’s listed coworkers include Taekkeun Lee and Ki-Myung Yoon.

Conclusion

Soonho Kwon’s two semiconductor device patents address practical design considerations in chip packaging and inverter modules, reflecting his work in semiconductor innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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