Fremont, CA, United States of America

So Zen Yao

This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: So Zen Yao. Retrieved from https://idiyas.com/inventor/so-zen-yao-3vi07iyz

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: So Zen Yao: Innovator in Integrated Circuit Design

Introduction

So Zen Yao is a notable inventor based in Fremont, California. He has made significant contributions to the field of integrated circuit design. His innovative approach focuses on improving signal integrity, which is crucial for the performance of electronic devices.

Latest Patents

So Zen Yao holds a patent titled "Method and system for improving signal integrity in integrated circuit designs." This patent discloses a method and system for enhancing signal integrity in integrated circuit designs. In some embodiments, the optimization of signal integrity is conducted in conjunction with detailed routing of an integrated circuit design based on a previously generated global routing plan.

Career Highlights

Yao is currently employed at Cadence Design Systems, Inc., a leading company in electronic design automation. His work at Cadence has allowed him to apply his innovative ideas in a practical setting, contributing to advancements in integrated circuit technology.

Collaborations

Throughout his career, So Zen Yao has collaborated with talented individuals such as Chih-Wei Jim Chang and Ying-Meng Li. These collaborations have fostered a creative environment that encourages innovation and the development of new technologies.

Conclusion

So Zen Yao's contributions to integrated circuit design exemplify the impact of innovation in technology. His patent and work at Cadence Design Systems, Inc. highlight his commitment to improving electronic design processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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