Hwaseong, South Korea

Siyeon Cho

This inventor holds 3 USPTO granted patents and 8 published patent applications. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2021-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Siyeon Cho. Retrieved from https://idiyas.com/inventor/siyeon-cho-tcozls1a

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 4.6

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2021-2026

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3 patents (USPTO):Explore Patents

Title: Siyeon Cho: Innovator in Magnetic Memory and Semiconductor Technology

Introduction

Siyeon Cho is a prominent inventor based in Hwaseong-si, South Korea. He has made significant contributions to the field of memory devices, holding a total of 3 patents. His work focuses on advancing technology in magnetic memory and three-dimensional semiconductor devices.

Latest Patents

One of Siyeon Cho's latest patents is a magnetic memory device and method of operating the same. This innovative device features a loop-type magnetic track with a first part and a second part arranged in a counterclockwise direction. It includes a first conductive line on the top surface of the first part and a second conductive line on the bottom surface of the second part. The magnetic track is composed of a lower magnetic layer, a spacer layer, and an upper magnetic layer that are sequentially stacked. Each conductive line is made of heavy metal and is designed to generate spin-orbit torque from the current flowing through it. This spin-orbit torque enables the movement of magnetic domains in the magnetic track in either a clockwise or counterclockwise direction.

Another notable patent by Cho is for a three-dimensional (3D) semiconductor memory device. This device comprises a substrate that includes a cell array region, a connection region, and a block selection region. It features a stack structure with horizontal layers that are vertically stacked on the substrate. Each horizontal layer contains electrode portions extending in a first direction and a connecting portion that connects these electrode portions in a second direction, which is perpendicular to the first. The device also includes block selection gate electrodes that intersect the sidewalls of the electrode portions.

Career Highlights

Siyeon Cho is currently employed at Samsung Electronics Co., Ltd., where he continues to push the boundaries of memory technology. His work has been instrumental in developing advanced memory solutions that enhance data storage capabilities.

Collaborations

Throughout his career, Siyeon Cho has collaborated with talented individuals such as Taeyoung Kim and Hyunmog Park. These collaborations have fostered innovation and contributed to the success of his projects.

Conclusion

Siyeon Cho is a key figure in the field of memory technology, with a focus on magnetic memory devices and three-dimensional semiconductor solutions. His contributions are shaping the future of data storage and processing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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