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For the Inventor, By the Inventor

Allentown, PA, United States of America

Sivanand Simanapalli

USPTO Granted Patents = 12

Average Co-Inventor Count = 2.2

ph-index = 7

Forward Citations = 553(Granted Patents)


Location History:

  • Allentown, PA (US) (1999 - 2002)
  • Santa Clara, CA (US) (2000 - 2004)

Company Filing History:

goldMedal8 out of 9,364 
 
Lucent Technologies Inc.
 patents
silverMedal2 out of 598 
 
Agere Systems Guardian Corp.
 patents
bronzeMedal2 out of 2,316 
 
Agere Systems Inc.
 patents

Years Active: 1999-2004

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12 patents (USPTO):Explore Patents
1. 6801995 - Method for optimally encoding a set of instruction codes for a digital processor having a plurality of instruction selectable resource types and an associated optimized set of instruction codes (2004-10-05),
2. 6530014 - Near-orthogonal dual-MAC instruction set architecture with minimal encoding bits (2003-03-04),
3. 6446193 - Method and apparatus for single cycle processing of data associated with separate accumulators in a dual multiply-accumulate architecture (2002-09-03),
4. 6272188 - Single-cycle accelerator for extremun state search (2001-08-07),
5. 6081921 - Bit insertion approach to convolutional encoding (2000-06-27),
6. 6064714 - Shifter capable of split operation (2000-05-16),
7. 6029267 - Single-cycle, soft decision, compare-select operation using dual-add (2000-02-22),
8. 6009128 - Metric acceleration on dual MAC processor (1999-12-28),
9. 6002726 - FM discriminator with automatic gain control for digital signal (1999-12-14),
10. 5991785 - Determining an extremum value and its index in an array using a (1999-11-23),
11. 5987490 - Mac processor with efficient Viterbi ACS operation and automatic (1999-11-16),
12. 5912908 - Method of efficient branch metric computation for a Viterbi (1999-06-15),
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