San Jose, CA, United States of America

Siddhartha Nath

This inventor holds 1 USPTO granted patent. Top assignee: Nvidia Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Siddhartha Nath. Retrieved from https://idiyas.com/inventor/siddhartha-nath-a9t2hmn3

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Siddhartha Nath: Inventor in Circuit Design and Machine Learning.

Introduction

Siddhartha Nath is an inventor based in San Jose, California, whose patent work applies machine learning to electronic circuit design. He is associated with NVIDIA Corporation and has 1 patent listed in the information provided.

Latest Patents

Nath’s patent, “Generative Self-Supervised Learning to Transform Circuit Netlists,” describes using self-supervised machine learning to size gates in a combinational circuit based on its input netlist. The disclosed transformer neural network selects gate sizes along paths connecting primary inputs and outputs, as well as sequential logic elements. These selections can be optimized for path delay, power consumption, and circuit area.

Career Highlights

The patent reflects work at the intersection of artificial intelligence and semiconductor design. By applying a transformer architecture to circuit netlists, the approach aims to support automated gate-sizing decisions across multiple design objectives.

Collaborations

Nath’s listed coworkers include Haoxing Ren and Geraldo Pradipta. The patent’s subject matter illustrates how collaborative engineering efforts can bring machine learning methods into circuit-design workflows.

Conclusion

Siddhartha Nath’s patent highlights an application of self-supervised learning to circuit optimization, with potential design trade-offs involving speed, power, and area.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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