Santa Clara, CA, United States of America

Siddharth Sawe


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2007

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1 patent (USPTO):Explore Patents

Title: Siddharth Sawe: Innovator in Integrated Circuit Testing

Introduction

Siddharth Sawe is a notable inventor based in Santa Clara, CA (US). He has made significant contributions to the field of integrated circuits, particularly in debugging timing-related failures. His innovative approach has the potential to enhance the reliability of electronic devices.

Latest Patents

Siddharth holds a patent for an "Event based test method for debugging timing related failures in integrated circuits." This method is designed to distinguish timing-related failures from other types of failures in integrated circuit devices. The process involves applying a test signal to a device under test (DUT) and evaluating its response output. If a failure is detected, the method identifies a reference clock signal related to the failure and incrementally adjusts the timing of events to observe changes in the DUT's response output.

Career Highlights

Siddharth is currently employed at Adv Antest Corporation, where he continues to develop innovative solutions for integrated circuit testing. His work is instrumental in improving the efficiency and accuracy of semiconductor testing processes.

Collaborations

Siddharth collaborates with talented professionals in his field, including Ankan Pramanick and Rochit Rajsuman. Their combined expertise contributes to the advancement of technology in integrated circuits.

Conclusion

Siddharth Sawe's contributions to integrated circuit testing through his innovative patent demonstrate his commitment to enhancing technology. His work not only addresses critical challenges in the industry but also paves the way for future advancements in electronic device reliability.

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