Tokyo, Japan

Shinobu Saito

This inventor holds 3 USPTO granted patents and 2 published patent applications. Top assignees: Nec Corporation, Ntt Corporation. Active years: 1999-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shinobu Saito. Retrieved from https://idiyas.com/inventor/shinobu-saito

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 2

Forward Citations = 24(Granted Patents)


Company Filing History:


Years Active: 1999-2025

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3 patents (USPTO):Explore Patents

Title: Innovations of Shinobu Saito

Introduction

Shinobu Saito is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 3 patents. His work focuses on improving the fabrication methods of semiconductor devices, which are crucial for modern electronics.

Latest Patents

One of his latest patents is titled "Method of fabricating semiconductor device with capacitor." This invention provides a fabrication method that prevents leakage current from increasing and dielectric breakdown resistance from decreasing during the chemical vapor deposition (CVD) or dry etching process for forming an insulating film to cover the capacitor. In this method, a lower electrode of a capacitor is formed on a first insulating film, which is typically placed on or over a semiconductor substrate. A dielectric film is then formed on the lower electrode, followed by an upper electrode that overlaps with the dielectric film. A second insulating film is created to cover the capacitor using a thermal CVD process in an atmosphere devoid of plasma, ensuring that hydrogen is not activated due to heat. The source material for this second insulating film is designed to prevent hydrogen generation during the thermal CVD process.

Another significant patent by Saito is for a "Semiconductor device with conductive plugs." This method involves manufacturing a semiconductor device that includes a CMOS section composed of both N-channel and P-channel MOS transistors, along with a memory section that features at least a transfer gate MOS transistor. A series of conductive plugs are formed to penetrate a laminate insulating film to connect with the MOS transistors. The laminate insulating film consists of a first and a second insulating film, while a capacitor section is constructed on top of this laminate. A third insulating film is then formed over both the laminate and the capacitor section, with a wiring pattern created to connect the conductive plugs.

Career Highlights

Shinobu Saito is currently employed at NEC Corporation, a leading company in the technology sector. His work at NEC has allowed him to push the boundaries of semiconductor technology and contribute to advancements in the field.

Collaborations

Throughout his career, Saito has collaborated with notable colleagues, including Yoshihiro Hayashi and Nobuhiro Tanabe. These collaborations have further enriched his research and development efforts in semiconductor innovations.

Conclusion

Shinobu Saito's contributions to semiconductor technology through his patents and collaborations highlight his role

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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