Tokorozawa, Japan

Shinjiro Yamada

This inventor holds 3 USPTO granted patents. Top assignees: Renesas Electronics Corporation, Renesas Technology Corp.. Active years: 2007-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shinjiro Yamada. Retrieved from https://idiyas.com/inventor/shinjiro-yamada-ush3ey6w

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 66.7

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2007-2013

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3 patents (USPTO):Explore Patents

Title: Shinjiro Yamada: Inventor in Information Processing

Introduction

Shinjiro Yamada is an inventor associated with Tokorozawa, Japan. His patent work includes approaches to reducing power consumption in information-processing devices while maintaining responsive handling of interruption requests. He is credited with 3 patents.

Latest Patents

Yamada’s listed patents focus on timer systems that manage waiting periods before scheduled events and system calls.

“Information processing device which specifies a waiting time until execution of a given event and makes a system call” describes a device with two timer circuits: a first timer operating on a longer cycle and a second timer operating on a shorter cycle. The device tracks the time remaining until an event and the next interruption request. It uses the first timer for longer waits and applies the shorter-cycle timer when the remaining wait falls below the first cycle, aiming to reduce power consumption without slowing interruption responses.

“Power consumption reduction and quicker interruption response in an information processing device utilizing a first timer and a second timer wherein the second timer is only conditionally activated” describes a related approach. It likewise uses a longer-cycle first timer and a shorter-cycle second timer, activating the second timer conditionally to manage shorter remaining waits while balancing energy use and interruption response speed.

Career Highlights

Yamada’s listed professional affiliations include Renesas Electronics Corporation and Renesas Technology Corporation. His patent work reflects an emphasis on timer management and power efficiency in information-processing devices.

Collaborations

Yamada’s listed coworker is Satoshi Misaka. The available information identifies this collaboration but does not specify the projects or roles they shared.

Conclusion

Shinjiro Yamada’s listed inventions address efficient event timing in information-processing devices, with a focus on reducing power consumption while preserving prompt interruption handling.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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