Shigeki Sakai

Title: Shigeki Sakai: Semiconductor Circuit Inventor

Introduction

Shigeki Sakai is an inventor associated with Tokyo, Japan, and NEC Electronics Corporation. His work includes a patent for a semiconductor integrated circuit and its layout method.

Latest Patents

Sakai’s listed patent, “Semiconductor Integrated Circuit and Its Layout Method,” describes a master-slice circuit with sequential and combinational circuit cells arranged alternately in an inner core area. Tree-connected selective driving elements distribute a multiphase clock signal across uniformly divided areas. The layout aims to equalize loads and wiring lengths between sequential cells and clock inputs, helping reduce clock skew and power consumption. Sakai is credited with 1 patent.

Career Highlights

Sakai’s patent reflects work on semiconductor circuit design, clock distribution, and physical layout. The described approach addresses the challenge of distributing multiphase clock signals while limiting timing differences among circuits.

Collaborations

Sakai’s listed coworkers include Masaharu Mizuno and Naotaka Maeda. His patent is associated with NEC Electronics Corporation.

Conclusion

Shigeki Sakai’s patented circuit-layout approach focuses on more balanced clock distribution, reduced clock skew, and lower power consumption in master-slice semiconductor integrated circuits.