Sheela R Shreedharan

Title: Sheela R Shreedharan: Innovator in Semiconductor Technology

Introduction

Sheela R Shreedharan is a prominent inventor based in Milpitas, CA (US). She has made significant contributions to the field of semiconductor technology, holding 2 patents that showcase her innovative spirit and technical expertise.

Latest Patents

One of her latest patents is titled "Reduced power set-reset latch based flip-flop." This invention includes a master latch circuit and a slave latch circuit designed to efficiently store input signals in response to clock signals. The master latch circuit is configured to decouple from a ground reference node, enhancing its performance. Another notable patent is focused on "Circuit modeling," which aims to improve software for predicting microchip interconnect delays. This invention provides accurate predictions of resistance, capacitance, and inductance for semiconductor interconnections, taking into account environmental values and process variations.

Career Highlights

Throughout her career, Sheela has worked with leading technology companies, including Apple Inc. and LSI Logic Corporation. Her experience in these organizations has allowed her to develop and refine her skills in semiconductor design and innovation.

Collaborations

Sheela has collaborated with talented professionals in her field, including Zhao Wang and Ajay Bhatia. These partnerships have contributed to her success and the advancement of her projects.

Conclusion

Sheela R Shreedharan is a remarkable inventor whose work in semiconductor technology continues to influence the industry. Her patents reflect her dedication to innovation and her ability to solve complex engineering challenges.