Hsinchu, Taiwan

Shao-Chien Chiu

This inventor holds 1 USPTO granted patent and 2 published patent applications. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shao-Chien Chiu. Retrieved from https://idiyas.com/inventor/shao-chien-chiu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Innovations by Shao-Chien Chiu in Wafer Inspection Technology

Introduction

Shao-Chien Chiu is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor manufacturing, particularly in the area of wafer inspection technology. His innovative approach utilizes machine learning to enhance the quality of defect inspection processes.

Latest Patents

Shao-Chien Chiu holds a patent for a method titled "Machine learning-based transformation of low-resolution wafer inspection images to high resolution images." This patent describes a defect inspection method that involves acquiring multiple images of a specimen at different resolutions. The method trains a machine learning model using these images to improve the accuracy of defect detection in semiconductor wafers.

Career Highlights

Chiu is currently employed at Taiwan Semiconductor Manufacturing Company Limited, where he applies his expertise in machine learning and image processing. His work focuses on improving the efficiency and effectiveness of wafer inspections, which are critical in semiconductor production.

Collaborations

Some of his notable coworkers include To-Yu Chen and Mao-Chih Huang, who collaborate with him on various projects within the semiconductor industry.

Conclusion

Shao-Chien Chiu's innovative contributions to wafer inspection technology demonstrate the potential of machine learning in enhancing semiconductor manufacturing processes. His work continues to influence the industry positively.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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