Company Filing History:
Years Active: 2017-2018
Title: Innovations by Shankarnarayan Bhat
Introduction
Shankarnarayan Bhat is a notable inventor based in Bengaluru, India. He has made significant contributions to the field of memory testing and optimization. With a total of two patents to his name, Bhat's work focuses on enhancing the efficiency and reliability of memory operations.
Latest Patents
Bhat's latest patents include "Continuous write and read operations for memories with latencies" and "Method and apparatus for optimized memory test status detection and debug." The first patent describes a method and apparatus for continuous write and read operations during memory testing. This method involves controlling a signal generator, triggering write addresses and data field operations each memory cycle, and reading addresses and data operations to the memory. An additional embodiment provides an apparatus for advanced memory latency testing, which includes a data generator trigger and an address generator trigger in communication with the signal generator. The second patent outlines a method for memory built-in self-testing (MBIST). This method initiates when a testing program is loaded from an MBIST controller, allowing for the determination of memory failures that are recorded in a failure indicator register during ongoing testing.
Career Highlights
Shankarnarayan Bhat is currently employed at Qualcomm Incorporated, where he continues to innovate in the field of memory technology. His work has been instrumental in advancing memory testing methodologies and improving overall memory performance.
Collaborations
Bhat collaborates with talented individuals such as Ashutosh Anand and Nishi Bhushan Singh, contributing to a dynamic and innovative work environment.
Conclusion
Shankarnarayan Bhat's contributions to memory technology through his patents and work at Qualcomm Incorporated highlight his role as a significant inventor in the field. His innovative methods and apparatuses are paving the way for advancements in memory testing and optimization.