Seong-II Han

Title: Innovations of Seong-II Han in Stacked Chip Packaging

Introduction

Seong-II Han is a notable inventor based in Suwon, South Korea. He has made significant contributions to the field of semiconductor packaging, particularly in the area of stacked chip configurations. His innovative approach addresses common challenges faced in chip bonding processes.

Latest Patents

Seong-II Han holds a patent for a "Stacked chip package using photosensitive polymer and manufacturing method thereof." This invention focuses on a stacked chip configuration where the gap between the lower and upper chips is completely filled using a relatively simple process. This method eliminates voids that can lead to cracking and delamination issues. The invention is applicable to both chip-level and wafer-level bonding approaches. A photosensitive polymer layer is applied to the first chip or wafer before stacking, and it is partially cured to maintain its adhesive properties. The second chip or wafer is then stacked, aligned, and bonded to the first, with the polymer layer fully cured to enhance adhesion and mechanical reliability. This innovation significantly improves device yield and reliability.

Career Highlights

Seong-II Han is currently employed at Samsung Electronics Co., Ltd., a leading company in the electronics industry. His work has contributed to advancements in semiconductor technology, particularly in improving the reliability and efficiency of chip packaging.

Collaborations

He has collaborated with notable colleagues, including Yong-Chai Kwon and Kang-Wook Lee, to further enhance the development of innovative semiconductor solutions.

Conclusion

Seong-II Han's contributions to the field of stacked chip packaging demonstrate his commitment to innovation and excellence in semiconductor technology. His patent not only addresses critical issues in chip bonding but also paves the way for improved device performance and reliability.