Savita Banerjee

Title: Savita Banerjee: Innovator in Asynchronous Circuit Design

Introduction

Savita Banerjee is a prominent inventor based in Bethlehem, PA (US). She has made significant contributions to the field of asynchronous circuit design, holding 2 patents that showcase her innovative approach to testing and synthesizing circuits.

Latest Patents

Her latest patents include a "Method for testing asynchronous circuits" and an "Initializable asynchronous circuit design." The first patent describes a synchronous test model (STM) that captures the essential behavior of an asynchronous circuit under test. This method involves constructing an STM, creating a target fault list, generating test patterns, translating them into test sequences, and validating the patterns through fault simulation. The STM offers numerous advantages, such as the ability to use synchronous test generation techniques and ensuring high fault coverage without test invalidation.

The second patent focuses on synthesizing initializable circuits from signal transition graphs (STG). It addresses both functionally initializable and uninitializable cases, transforming the STG into a functionally initializable specification while maintaining essential properties like liveness and unique state coding.

Career Highlights

Savita Banerjee is currently employed at NEC USA, Inc., where she continues to advance her research in circuit design. Her work has been instrumental in developing methods that enhance the reliability and efficiency of asynchronous circuits.

Collaborations

She collaborates with notable colleagues, including Srimat T Chakradhar and Rabindra K Roy, contributing to a dynamic research environment that fosters innovation.

Conclusion

Savita Banerjee's contributions to asynchronous circuit design through her patents reflect her expertise and commitment to advancing technology. Her work not only enhances circuit testing methods but also paves the way for future innovations in the field.