Satoko Kamakura

Title: Satoko Kamakura: Semiconductor Memory Inventor

Introduction

Satoko Kamakura is an inventor associated with Hyogo, Japan. Her patent work includes semiconductor memory designs, and she is associated with Renesas Technology Corp. Kamakura is a woman inventor with 4 patents.

Latest Patents

Kamakura’s listed latest patent concerns a semiconductor memory layout designed to reduce the area of a memory array block without narrowing the floating-gate widths. It arranges select gates in straight lines along the X direction, with two rows of floating gates between the upper and lower select gates. The floating gates are staggered in a zigzag pattern, so gates in adjacent columns are offset from one another in the Y direction. This layout aims to make more efficient use of memory-array space while preserving floating-gate dimensions.

Career Highlights

Kamakura’s patent record reflects work on semiconductor memory architecture and compact memory-array layouts. Her association with Renesas Technology Corp. places this work within the semiconductor technology industry.

Collaborations

Yutaka Takikawa and Koichi Kawauchi are identified as Kamakura’s coworkers. Their shared professional context connects her work to a broader team involved in semiconductor technology.

Conclusion

Satoko Kamakura’s documented invention focuses on a staggered floating-gate arrangement that can reduce semiconductor memory array area while maintaining gate widths.