Colorado Springs, CO, United States of America

Sargent S Eaton, Jr

This inventor holds 10 USPTO granted patents. Top assignees: Inmos Limited, Mostek Corporation, Other. Active years: 1981-1986.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sargent S Eaton, Jr. Retrieved from https://idiyas.com/inventor/sargent-s-eaton-jr

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 1.5

ph-index = 7

Forward Citations = 252(Granted Patents)


Company Filing History:


Years Active: 1981-1986

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10 patents (USPTO):Explore Patents

Title: The Innovations of Sargent S. Eaton, Jr.

Introduction

Sargent S. Eaton, Jr. is a notable inventor based in Colorado Springs, CO, with a remarkable portfolio of ten patents. His work primarily focuses on advancements in semiconductor technology and memory circuits, contributing significantly to the field of electronics.

Latest Patents

Eaton's latest patents include a method and apparatus for reducing latch-up susceptibility in CMOS circuits. This invention involves sensing power supply transitions and clamping the substrate to ground, which helps prevent latch-up conditions. Additionally, he developed a dynamic random access memory cell that enhances signal margin, thereby improving the reliability of data storage in memory circuits.

Career Highlights

Throughout his career, Eaton has worked with prominent companies such as Inmos Limited and Mostek Corporation. His contributions to these organizations have been instrumental in advancing semiconductor technologies and memory solutions.

Collaborations

Eaton has collaborated with notable individuals in the industry, including David R. Wooten and John D. Heightley. These partnerships have fostered innovation and development in various projects.

Conclusion

Sargent S. Eaton, Jr. stands out as a significant figure in the realm of electronics, with his inventions paving the way for future advancements in semiconductor technology and memory systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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