The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 1984

Filed:

Apr. 22, 1981
Applicant:
Inventors:

Sargent S Eaton, Jr, Colorado Springs, CO (US);

David R Wooten, Colorado Springs, CO (US);

Assignee:

Inmos Corporation, Colorado Springs, CO (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307269 ; 307578 ; 307583 ;
Abstract

A trigger circuit is described for use in an MOS clock generator. The clock generator is the type which uses a conventional double bootstrapping circuit coupled to a control transistor to develop a high level clock output signal. The trigger circuit preconditions the control transistor to facilitate proper bootstrapping operation. Included in the trigger circuit is a plurality of interconnected transistors which respond to a pre-charge signal and then a warmup signal for turning the control transistor off and then for establishing selected potentials at the electrodes of the control transistor to precondition it for bootstrapping. In response to a subsequent trigger signal, the trigger circuit enables the control transistor for developing a high level clock output signal.


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